Active matrix devices such as displays (e.g. televisions, laptop monitors), imagers (e.g. x-ray imagers) and sensors typically use hydrogenated amorphous silicon (a-Si:H) and, in some applications, low-temperature poly-silicon (LTPS) thin-film transistor (TFT) backplanes on glass or, for flexible devices, clear plastic. However, for very high resolution applications (>1000 pixels per inch (ppi)), such as micro-displays or pico-projectors, the carrier mobility of a-Si:H (electron mobility of about 1 cm2/Vs) is too low to provide sufficient drive current at short TFT channel widths. For applications requiring high drive current such as organic light emitting diodes (OLEDs), it is necessary to shrink the gate length and/or increase the gate width of a-Si:H transistors. This leads to increasing the processing cost of a-Si:H active matrix circuits due to the relatively small gate lengths as well as a significant trade-off in display resolution due to larger gate widths. LTPS is more expensive than a-Si:H, but capable of providing higher drive currents. The device-to-device variation of threshold voltage and mobility in LTPS transistors require compensation circuitry that limits the resolution of the active matrix. Single crystalline silicon (c-Si) has been used as an alternative for very high resolution backplanes, but processing c-Si requires high temperatures not compatible with glass substrates currently used in manufacturing a-Si:H or LTPS devices or clear plastic substrates that may be used.